Advance Program

1st IEEE/CPMT 2-day Workshop on

Accelerated Stress Testing

SEPTEMBER 7-8, 1995
at Tandem Computers, Inc
Cupertino, CA

Sponsored by the Santa Clara Valley chapter of the
Components, Packaging, & Manufacturing Technology (CPMT) Society of the Institute of Electrical and Electronics Engineers (IEEE); CPMT's TC-7 on Accelerated Life Testing; and the Santa Clara Valley Chapter of IES.

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Accelerated Stress Testing (AST) has become an accepted practice in a number of companies seeking the highest quality products. "Best practices" are now circulating as models upon which other industrial companies can build. This local Workshop, held in the Santa Clara Valley, will be a forum for sharing novel and useful AST techniques and results within the computer and communications fields for subsystems (peripherals, terminals, power supplies) and systems (workstations, computers, central office equipment). We invite your participation.


TECHNICAL PRESENTATIONS: talks by technologists actively involved in accelerated stress testing.

PANEL DISCUSSIONS: interactive discussions of immediate needs, problem areas, concerns and innovative solutions that constitute Best Practices.

TOURS Walk-throughs and presentations at two local corporate accelerated testing labs -- Tandem Computers, and Sun Microsystems.

SHARING: Meeting technical professionals in the accelerated testing field in an intimate, open environment.

WORKSHOP BOOKLET OF EXTENDED ABSTRACTS: Each attendee will receive a booklet containing extended abstracts of the presentations.

LIMITED ATTENDANCE: Participation will be limited to 75 individuals from the pool of applicants. Presentors are assured admission, although co-authors may not be. If the Workshop is oversubscribed, then professionals in non-AST fields may need to be declined acceptance, and limits may be placed on the number of participants from each company.


THURSDAY, September 7, 1995

7:30 - 8:15 AM: Registration, with coffee and rolls

8:15 - Welcome: Paul Wesling, Tandem Computers, and CPMT Society Vice President, Publications

8:20 -- Keynote Talk: "Overview of Accelerated Stress Testing", Dr. Tony Chan, AT&T Bell Labs, Workshop Chair

8:45 - 10:15 -- Session 1: Modern Approaches to AST

"A New Set of Guidelines for Environmental Stressing", Francoise Sandroff, Duncan Culver, Aridaman Jain, Theodore Shankoff, Bellcore (Red Bank, NJ)
Bellcore has developed a new set of guidelines, which will be presented; a cost/benefit model will be described, and two cost/benefit examples will be presented.

"Maintaining Quality with ESS", Alfred Sugarman, Octel Corp.
Stress testing on printed circuit assemblies is being done to assure field reliability. In-circuit testing is performed before and after stressing to evaluate effectiveness. EST is also preformed at the system level, but with some limitations required by certain assemblies.

Panel: "Approaches to AST", with discussion
(coffee break: 10:15 - 10:30)

10:30 - Noon -- Session 2: Vibration
"High Frequency Vibration (5kHz - 10kHz) in ESS", Gil Bastien, Screening Systems, Inc.
Higher frequencies are not considered in most stress testing since most failures occur at lower or intermediate frequencies. This paper explores the higher frequencies and the effects on components and surface flaws.

"Vibration Modeling and Analysis", Edmond Kyser, Tandem Computers

"Random Pheumatic Hammer for ESS Applications", John Hess, Storage Technology Corporation (Louisville, Colorado)

(no-host lunch: Noon - 1:30)

1:30 - 2:45 -- Session 3: AST Case Studies
"Configuring ESS for Quick-to-Market Products", Cheryl Ascarrunz, Edmond Kyser, Tandem Computers
Development and release programs can be shortened by reviewing screening histories of similar products, testing prototype assemblies, and using step stress to failure tests to confirm mechanisms. An example will be described of application of this quicker process.

"Space Applications of Systems Approach to Environmental Testing," Stephen Cornford, Mark Gibbel, JPL

(coffee break: 2:45 - 3:00)
3:00 - 4:30: Demonstration of LabView software and its use in the lab; Tour of Tandem Computers' AST labs

6:00 - 8:00 PM: Dinner meeting, hosted by IEEE Technical Committee on Accerated Stress Testing (TC-7) -- Tony Chan, TC-7 Chair

FRIDAY, September 8, 1995
8:30 - 10:00 AM -- Session 4: Reliability Improvement
"Reliability and Yield Growth and Cost Savings Through EST/ESS Process Control and Corrective Actions -- A Case Study", Kunal Roy, Hughes Network Systems (San Diego)
It was found that both EST during design and ESS during early manufacturing were required; small sample sizes during development resulted in no failures, while doing ESS during manufacturing found latent problems.

"Statistical Inferences and Analysis of an ESS Program", David Christiansen, Edmond Kyser, Tandem Computers
A screening program was begun in the second quarter of shipments of a new product, allowing comparison of screened and unscreened populations. Results are analyzed statistically to assess theeffectvieness of this reliability enhancement program.

"Environmental Test Effectiveness", Mark Gibbel, JPL
(coffee break: 10:00 - 10:15)

10:15 - 11:45 AM -- Open Forum
Short talks by attendees, each from 5 to 10 minutes in length. If you have practices or observations to share, bring one or two viewgraphs and solicit comment and feedback from the Workshop attendees. Potential questions you can address: <
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1:30 - 3:00: Tour of Sun Microsystems' AST labs in Mountain View (tentative -- map provided)

Chair: Anthony Chan, Ph.D., AT&T Bell Laboratories, Princeton
Technical Program: Edmond Kyser, Ph.D., Tandem Computers, Inc.
Finance: David Llewelyn, LTX Corporation

Program Committee:
Anthony Chan, Ph.D., AT&T Bell Laboratories (TC-7 Chair)
David Horsma, Ph.D., Raychem Corp.
Harry McLean, Qualmark
Dennis Pachucki, Tandem Computers, Inc.

To receive additional printed copies of the Advance Program and application for participation for this Workshop, send your name, mailing address, and internet email address (if available) to the registrar, below.


Chaired by Dr. Tony Chan of AT&T Bell Laboratories, this committee was established to assist professionals involved in assuring that their electronic system hardware is robust and meets world-class standards for design quality. Interest is from the chip package level up to fully assembled large systems, with a special emphasis on the use of environmental stress testing as a means of qualifying and systematically improving product reliability. Members share techniques for product qualification, simulation, environmental testing, and other aspects of assuring that a product is mature enough for market. Membership includes technologists from around the world.

You need not be an IEEE member to be a member of TC-7. To be added to the mailing list for the TC-7 Newsletter, contact the chairman at +1-609-639-2420 (or via email at

All Workshop attendees are invited to attend the autumn meeting of this TC, held during the Workshop's Thursday evening dinner; indicate your interest on the registration form, above.

Paul Wesling / August 28, 1995