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CPMT Technical Committee
This Committee was established to assist professionals involved in assuring that their electronic systems hardware is robust and meets world-class standards for design quality and durability. Over the last few years the demand for increased reliability in electronic hardware has required new methods and technologies. Accelerated Stress Testing (AST) has been embraced by an ever widening array of worldwide companies seeking to reconcile the need for the highest quality product with the necessary push for early time to market. TC-7 goals are to help share ideas on new ways of effectively detecting and removing the causes of field failures in electronic components and systems. One of the most valuable tools has been the new approach of accelerated testing based on the capabilities and limits of electronic materials and systems under environmental stress conditions. Through the process of stimulating the materials and hardware to operational failure, and then understanding the root cause of the physical weaknesses and improving those weaknesses has been found to be one of the most efficient ways of making a mature product in the shortest time. The TC-ASTR main focus is holding an annual ASTR Workshop. The purpose of the AST Workshop is to share these new ideas and continue dialog with the test and reliability professionals onas on better ways of accelerating and detecting hidden defects, flaws, and weaknesses in electronic and electromechanical hardware that would result in failures during use. These techniques are focused on testing electronic hardware to operational and possibly destruction limits and root cause investigation to determine the physics-of-failure and cost effective improvements in durability. The goal of AST is to produce mature products at market introduction and, in making it robust, the product can be screened for manufacturing defects with high levels of combined stresses (beyond end-use specifications) for shorter lengths of time.
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